Bug ID 1586773: BX520 Internal FPGA links can fail to come UP during initialization

Last Modified: Apr 28, 2025

Affected Product(s):
F5OS F5OS-C(all modules)

Fixed In:
F5OS-C 1.8.0

Opened: May 17, 2024

Severity: 3-Major

Symptoms

On the BX520, internal FPGA links fail to initialize with the following error: fpgamgr[9]: nodename=blade-11(p1) priority="Err" version=1.0 msgid=0x301000000000006 msg="SDK error during programming." API="f5sw_xilinx_cmac_datapath_reset" port=18 error="Waiting for the Xilinx MAC RX_ALIGN to be acheived has failed. Number of retries have exceeded".

Impact

Traffic outage between FPGAs.

Conditions

Reboot of a BX520 blade.

Workaround

Reboot the affected blade.

Fix Information

Implement updated initialization procedure for internal FPGA links.

Behavior Change

Guides & references

K10134038: F5 Bug Tracker Filter Names and Tips