Bug ID 499212: E5 and E5 v2 CPU TSC not reset on warm boot

Last Modified: Jul 12, 2023

Affected Product(s):
BIG-IP TMOS(all modules)

Known Affected Versions:
11.2.1, 11.3.0, 11.4.0, 11.4.1

Fixed In:
11.4.1 HF8, 11.4.0 HF10

Opened: Jan 02, 2015

Severity: 2-Critical

Related Article: K15998


Intel E5 and E5 v2 CPU TSC is not reset when you issue a soft reboot after approximately 100 days without a power cycle.


This is an intermittent issue: Soft lockup - CPU#2 stuck for 66s! [swapper:0]. Affected machines might be unstable, possibly hang or encounter a divide-by-zero panic. This is related to the Intel errata: 'TSC not reset on warm reboot' can exhibit various soft lockup symptoms very early in the boot.


This occurs on Intel E5 and E5 v2 CPU TSC, specifically on 10000 platforms and 2250 blades, and on BIG-IP VE guests hosted by VMware running on physical hardware with Intel E5 or E5 v2 CPUs. It might also occur with other hosts running BIG-IP VE guests, such as Xen or KVM. Note: The issue does not occur on Microsoft Hyper-V hosts.


Power cycle the physical device, either from toggling the external power source, or by using the AOM/LBH menu to issue a power cycle to the platform. There is a possibility that issuing a hard reset is sufficient, but a power cycle to the physical device is certain to correct the issue. Note: Unlike hardware platforms, there is no workaround for VMware-specific guests because the procedure requires a power cycle on the host. Rebooting the guest does not reset the hardware TSC in any case. There is no functionality on the guest that is equivalent to a power cycle on actual, physical hardware platforms.

Fix Information

The operating system now works correctly after a soft reboot taking into account the unfixed Intel TSC errata.

Behavior Change

Guides & references

K10134038: F5 Bug Tracker Filter Names and Tips